A Videocardz report indicates that a 2019 AMD patent application for “big.LITTLE” translator code was recently published, giving AMD the tools it needs to develop an x86 processor using a similar strategy to Intel’s “big-Bigger” Alder-Lake. Given the timing, concerns regarding how its future Strix Point processor strategy might play out take a back seat to the breadth of patented techniques: Could AMD’s ‘task transition between heterogeneous processors’ cover the code necessary to optimize Intel’s upcoming Alder Lake core scheduler?
The first thing to note is that several of the terms in the publication appear overly broad, which could render the patent either partially or entirely unenforceable. Next, we didn’t see any mention of the patent actually being awarded. Digging deeper, we couldn’t even find US2021/0173715A1 at the US Patent Office web site, nor did we find the Application Number 16/709,404. We even used Google Image Search to find other copies of the file images, only to find sites sourcing the Videocardz article.
We’re not saying that this doesn’t exist, only that we cannot find it. The server not properly updating its front end is one possibility, considering the state of internet involving the US Government. But until we see otherwise, we’re going to assume that Intel either owns all the IP it needs, or has reached an agreement with AMD. Intel does after all own the basic x86 architecture, and the firms constantly cross license technology to assure the smoothest possible end-user experience.